FPGA IP core providing a multimaster CAN serial bus

Kuantek's CAN/CAN FD IP core has been designed according to ISO 11898-1:2015 specifications and provides a multimaster serial bus that is highly suited to a wide range of applications such as test and measurement, sensor control, and vehicle networks.

It can be configured via the built-in AXI4-Lite interface or a standard address/data interface, with options including mode select, arbitration phase baud rate prescaler and bit timing, and data phase baud rate prescaler and bit timing.

The core supports flexible data rates of up to and greater than 1 Mb/s, and offers a range of features including user-configurable TX/RX buffers, message timestamping, and error logging.